Recently, integrated digital logic circuits have been developed which combine bipolar and CMOS technologies. These circuits are referred to as BiCMOS circuits. The combination of bipolar and CMOS technologies is advantageous in that the beneficial features of each technology may be utilized in combination to provide an optimal circuit. For example, bipolar circuits have fast switching capabilities and typically drive larger capacitive loads. On the other hand, CMOS circuits have the advantage of low power consumption, rail-to-rail output capability, high density and a very high input impedance. Thus, the combination of these features allows the superior aspects of each to be exploited and combined to yield the optimal circuit performance.
One specific area of application of BiCMOS technology is providing compatibility between emitter-coupled logic (ECL) circuits and CMOS circuits. ECL circuits provide the fastest and most popular bipolar logic circuits available, but consume more power than CMOS or BiCMOS circuits. Other benefits of ECL circuitry include the implementation of circuitry having relatively small signal amplitude and temperature sensitivity, which are features that are not easily implemented with standard CMOS techniques.
BiCMOS is especially applicable interfacing CMOS circuitry to ECL circuitry since such an interface is not easily accomplished at high speeds using MOS techniques and high-speed operation usually requires the use of bipolar devices. Even though some prior art CMOS circuits exist which provide a direct interface to ECL circuits exist, these circuits have special requirements which must be met to accommodate the bipolar speeds. Simpler CMOS designs also have high noise margin and low power consumption.
In general, differential amplifiers in the prior art are used to interface between ECL circuits and CMOS logic. A differential amplifier receives a difference signal and converts it to a single-ended signal which other circuits utilize. Ideally, the output from the differential amplifier is entirely independent of the individual input signal levels. BiCMOS amplifier circuits have been created in the prior art. However, these amplifier circuits typically do not accommodate differential signals and do not amplify small signals to large signals very quickly. Moreover, these prior art BiCMOS amplifiers do not operate at low voltage levels.
Another drawback of conventional BiCMOS logic circuitry is its requirement of a high supply voltage during normal operation mode. Therefore, many prior art BiCMOS circuits do not operate as desired once the power supply drops from its normal operating range. This characteristic is a concern since the semiconductor industry is currently trying to lower the standard operating supply voltage from five to three volts in order to decrease the electric field to which the devices are subjected. Thus, what is needed is an integrated circuit combining CMOS and bipolar technologies to implement an interface between differential signal outputting devices and CMOS logic. Furthermore, such a circuit must be capable of operating at a reduced supply potential.
As will be seen, the present invention provides a BiCMOS digital amplifier. In addition, the BiCMOS digital amplifier of the present invention is a high-speed low-power amplifier which operates at a low voltage.